Summary: Adopt AD590M as the temperature sensor, control the filmy open electric heating of the electric conduction through the modal conversion of the work of the control relay, realize long-range monitoring and control of the glass temperature of kleptoscope window, has achieved the goal that go to the ice, reveal or go to the fog as window cover glass of kleptoscope. Keyword: Kleptoscope; Temperature sensor; Cover glass; Window comparator

Sum up for prevent sea water from enter inside the kleptoscope, population of light, in kleptoscope have one can bear certain the intersection of sea water and cover glass of static pressure. When the submarine uses the kleptoscope to observe under the cold climatic condition, the intersection of header and window its will moral integrity that ground cover condense cover soon, only solution lift down kleptoscope develop, rise, observe and then in sea water the past. But this kind of method is inconvenient, the result is unsatisfactory, are covered with soon after after rising. Under the extremely cold climate, such as while using in the Arctic Ocean, the kleptoscope will be received severely to influence and lose utility. The method which solves the above-mentioned problems is to set up cover glass of header to heat the device in the kleptoscope, it does to offer deicing, defrosting for window cover glass of submaine periscope and go to the fog, guarantee the normal use of the kleptoscope.

The temperature controlling system of temperature controlling system is made up of heating conductive membrane, temperature sensor and controlling circuit on window cover glass of kleptoscope. Measured the window and protected vitreous average temperature by two temperature sensors AD590M on the glass diagonal line of window, turn the sensor output current into the voltage through the detection circuit of temperature, compared with threshold voltage of the voltage comparator of dual limits, reveal the work of protecting the vitreous real temperature range and combining the control relay, normally closed through every electrical relay, it is changed, realize the control on open electric heating of conductive membrane of cover glass of window that the normally-open contact work is modal. The conductive membrane plates diaphanous conductive membrane on window cover glass of kleptoscope, plate metal electrode at the filmy circumference of the electric conduction, bond temperature sensor in the window protects four vitreous angles, heat the Temp.-controlling device and exert the controllable AC supply of voltage to the conductive membrane through the perimetral metal electrode of the membrane, heat window cover glass of kleptoscope. Because the conductive membrane is always exposed to the air, so membranous layer is apt to be influenced by damaging and dirt dust, after being energization, accelerate moving in the conductive membrane freely and electronic vigorously, enable electricity to change into heat energy, play heating to act on cover glass. If the energization heating temperature is too high, time too will loss, short out even puncture mottled membranous layer long, when it is underwater to lower the kleptoscope into, produce vitreous popping easily. If open electric heating hypothermia, it is too short, the purpose that can’t achieve deicing rapidly, defrosting and go to the fog. Should solve this contradiction, except the suitable power of choosing the heating arrangement, automatic regulation and control of the heating temperature are very essential, in order to meet the requirement that is heated under different external temperature. The semi-conductive temperature sensor of choice of the temperature sensor mainly has two kinds of main types of digital temperature sensor and simulation temperature sensor, and every kind of type includes a variety of products. The digital temperature sensor monitors functions such as local and long-range temperatures,etc., have already replaced the temperature sensor of analog output in a lot of are employed. But the simulation temperature sensor can emerge and become the voltage or electric current signal of presenting the linear proportionate relationship with the temperature, and does not need additional linearizer to normalize the nonlinearity of the sensor, so the analog output temperature sensor has extensive application in case of not needing digitization to output in those, such as AD590M Tap temperature sensor. AD590M is a single scale integration both ends Tap temperature sensor that U.S.A. simulation device Company produces, its working voltage 4~30V; Examine warm range - 55~150 ℃; Precision

3G WCDMA/UMTS just began to dispose in the world, hankering after the new technical personage will lose enthusiasm to this once for a time hot new technology, then begin to pay close attention to the packet access of descenting at a high speed (HSPDA) Technical beautiful future. The technological trade seems to be always constant change like this. Once we are sure that it is feasible to dispose a certain technology, we will begin to seek the next and great innovation to break through, HSDPA is exactly like this. So, before joining the debate, please allow me to explain one point: The question does not lie in whether HSDPA will be replaced UMTS, but HSDPA knows the compliance general trend and develops into a kind of technology apt to dispose, and the software that becomes the existing 3G UMTS network is strengthened edition. HSDPA is moving towards commercialization, 43 networks come into operation at present, another there are 63 network planning and is at disposing or experimental stage. cingular wireless Company began the introducing trader to use HSDPA business on some markets of North America at the end of 2005, and estimate UMTS/HSDPA network will finish the arrangement in most staple markets of U.S.A. before the end of this year. Its main operator (including NTT DoCoMo, Vodafone and T-Mobile) Began to introduce HSDPA business too in 2006. The main operator of Europe is carrying on the test, it is estimated that will dispose in 2006 following Asia and North America, most WCDMA/UMTS runs the staging of association of dealers to HSDPA. In fact, some operators jumped over UMTS and and disposed HSDPA technology (data source directly simply: 3G Americas, July of 2006) . However, few people mention the meaning that is designed to the mobile phone of this kind of agreement in disposing course in HSDPA network. Certainly, after disposing high-efficiently, HSPDA can offer the data rate of 3.5G characteristic and 14.4Mbps.

A lot of advantages of developing HSPDA step by step are setting up above the following fact foundations, this agreement is basically right 3GPP (3G cooperative partner’s project) Normal expansion. It can improve bit rate through building up familiar UMTS technology, and will mainly handle the task to shift from control device of radio network to Node B (base station) ,Thus near the air interface even more. So, the mobile phone OEM manufacturer can reuse the majority and have UMTS design work now while developing HSDPA device, only need to add the characteristic more high SIGPROC signal processing assembly. However, what merits attention is, the design of the receiver of the mobile phone does not change much at present; WCDMA sender basically maitains unchanged. HSUPA (the upstream packet access of high speed) Will walk slowly like a woman subsequently.

The obstacle that still needs to cross over, in order to fully excavate the potentiality of HSPDA speed of download, we need receiver technology more advanced than CDMA target type receiver that use in the early solution. These more advanced receiver technologies just improves to some extent, but is far from offering the potentiality of anticipated crest value. And the advanced equalizer can solve the above-mentioned problem. The aerial question is another key element. Though the single aerial system is suitable for employing and can totally give play to the ability of data rate partly in cases there are ideal air interface conditions, but high-performance mobile phone and PDA can only choose to receive various (receiver diversity)s Pair aerial system. Increase a receiver and aerialing makes the mobile phone can realize more high speed of download under most air interface conditions. HSPDA will influence SIGPROC signal processing of the mobile phone and system control seriously, so need more complicated hardware and software. This is from the following facts obviously, it supports 16 stepses of straight intermodulation one (16 - QAM) , the periodic line is adapted, physical layer transmit and mix automatic retransmission again (HARQ) Physical layer of association, signal channel terms feedback, and allow to share by air interface the transmission channels news of the signal channels of users many, namely high-speed descending share channel (HS-DSCH) . The high steps 16 - QAM modulation needs more high radio characteristic, especially more high linear scale. In addition, the receiver can measure the quality of signal channel and provide for base station and feedback. Adopt most new and 65nm technological how key appearance of semiconductor device bring for designer enormous to help, make them meet HSPDA more quick processing rate and more high memorizer demand, can meet power consumption and cost and save the demand at the same time, this is 130nm and 90nm technological enormous progress which UMTS system adopts at present. Though 2 sets of aerials will gather the identical signal, but integrating in the mobile phone can establish to receive the diversity or adaptive modulation function optimally and receive the state under various chain travel permit one of dual receivers and one pair of aerial systems. This needs each set of aerials and receivers to run in their each independent signal transmission channel, can formate these two input signals while requiring the system at the same time, in order to offer the best single signal, this will obviously bring the size question. However, the maximum challenge that the designer that double antenna, dual collector dispose faces is to put the aerial with the distance as far as possible, that is to say one is on-mike, another one nears the earphone, lie in both ends of the mobile phone respectively. This will form an interesting problem in renovating the mobile phone, because the signal must pass the hinge.

The final road is becoming riper with UMTS market, the same as EDGE arrangement situation after GPRS market is ripe, the arrangement for HSDPA is growing in intensity too. Dispose HSDPA network with companies such as Cingular and NTTDoCoMo,etc., the above-mentioned trend begins to float above the surface of water. Unless the HSPDA cell-phone one and it is getting more high efficiency bring out the best in each other with high performance, in addition,because of processor can deenergization within more long time, the life time of the battery can be lengthened too. In a word, HSPDA is a kind of quite striking technology, but the mobile phone can’t permit and look small to design the challenge at all. (this text publishes in Spain Mundo Electronico magazine at first)

LM2717-ADJ is the new product that half a company of country put out recently, it is a kind of double-output composed of two PWM step-down type converters, voltage adjustable IC. The leading particulars of this device: The switched current of the internal gas switching tube of the step-down type converters of No. the first is reachable 2.2A( R DS(ON) =0.16Ω) ; The switched current of the internal gas switching tube of the step-down type converters of No. the second is reachable 3.2A( RDS(ON) =0.16Ω) ; Input the voltage range 4- 20V; The output voltage can be had the resistance to presume outside by two, the low-voltage is 1.267V the most; Switching frequency can be presumed within the range of 300- 600kHz; There is low-voltage protection and overheat protective of input in inside; 24 pins TSSOP are capsulated; Operating temperature range - 40 ℃- +125 ℃.

This device constituent duplicate supply is mainly applied to the computer schedule products on TFT-LCD display unit, handheld electronic device, walkie electronic product and knee.

The pin arranges the and function

The pin of LM2717-ADJ is arranged and shown as in Fig. 1, the function of every pin is shown in Table 1.

The pin of Fig. 1 LM2717-ADJ is arranged

Pertinent parameter ( Representative value)

LM2717-ADJ pertinent parameter is as follows: Quiescent current I Q =2.7mA; Reference voltage V BG =1.267V; It is 4- 20V to input electric V IN; The limiting value of switched current: The first No. is 2.2A, the second No. is 3.2A; The frequency presumes it is the resistance R F: R F =4.64kΩ hour, F SW =300kHz; R F =2.26kΩ hour, F SW =600kHz; Close and control: Normal operation of power, VH> 1.8V; The power is closed, NL< 0.7V; Undervoltage is latched when the input voltage V IN is lower than 3.6V; Normal operation when the input voltage V IN is higher than 3.8V.

Circuit of typical application

Fig. 2 exports the application circuit of 15V and 3.3V

Fig. 3 exports the application circuit of 5V and 3.3V

Fig. 4 boots the boost-up circuit

The typical application of LM7217-ADJ circuit is shown as Fig. 2 and Fig. 3. Fig. 2 is a kind of input 17- 20V, export the application circuit of 15V and 3.3V; Fig. 3 exports the application circuit of 5V and 3.3V under the same input voltage. The basic parameters of these two pieces of circuit are the same, the main difference is presuming the output voltage is different to resistance-values of the resistance voltage divider which feedbacks the end. C BOOTx (x value is 1 or 2) in Figs. 2, 3 It is a bootstrap boost capacitor, it can improve the voltage of the driver, there is sufficient VGS voltage to guarantee N-MOSFET, as shown in Fig. 4. At the time of having electrically, from VIN D C BOOST LX C OUTX electric current of person who reach give C BOOST and C OUTX (including C OUTXA) Charge, because of C BOOST< < ( C OUTX+C OUTXA) ,So the voltage of V IN is lowered on C BOOST mostly. The voltage V CBOOST on C BOOST is equal to the driver voltage V DRI, has guaranteed V GS magnitude of voltage of N-MOSEFT.

This text mainly introduces the choice of the device parameter of hitting some times of the circuit.

Settlement of a output voltage

The backfeed loop in the output voltage V OUT and Figs. 1, 2 divides the compressive resistance R FB1(3) And R FB2(4) Relevant, its relational expression is:

V OUT =(1+R FB1(3) /R FB2(4) )

Summary: This text propose one Fu set up leaf USB simple and easy to realize in data collecting system in the spectrometer. Keyword: USB; Microcontroller; Multiple channel; Data acquisition

The foreword will often meet the situation needing to input various analog signals in the computer observes and controls the system, must need to change A/D at this moment. In some actual projects sometimes, choose some dedicated data collecting cards in order to gather some analog quantity, not only make the system more complicated,but also not apt to realize the function is expanded, increases the systematic design cost yet. On the other hand, the USB interface is easy to operate more and more widely used, so the USB interface of the Apparatus is a development trend. XFT-1 type open Fu set up leaf, vary spectrometer, adopt classical the intersection of Michael and modest interferometer, the light intensity after interfering changes with movement of the index glass, the electro-optic recipient target transforms the mere strong signal of secular change that is received for the corresponding voltage signal. In order to remove because not even errors caused of the migration velocity of the index glass, adopt the double channel in the module, measure the reference light (He-Ne laser) at the same time And after examining the light source, utilize and consult photic information to correct the position error of optical measurement examined. In XFT-1 type open Fu sets up the leaf and varies the spectrometer, have adopted such simple and easy USB data collecting system that this text put forward. In view of the economic, practical factor, have adopted one-chip computer and common USB interface chip in the system, will both combine the data acquisition system design which will realize the USB interface. The epistasis PC has adopted C # language programming, the data real-time display that gets gathering, handling the analysis, data to keep and print.

The hardware, circuit design this, system regards ADuC841 of ADI Company as the core to realize data acquisition and control. This one-chip computer lasts single instruction cycle 20MIPS 8052 kernels and 8 passways of 420Ksps at a high speed, 12bit A/D converter, support online download. Control device and ADC have integrated and shortened development time, has improved the stability of the system. This text regards oozing the permanent USB interface chip CH375 in Nanjing as the core and realizes USB data transmission. The following characteristic: Compatible USB2.0; Shield the associated USB agreement under the built-in firmware mode, finish canonial USB and enumerate the configuration procedure automatically, do not need local end control device to do any treatment at all, has simplified the firmware programming of the one-chip computer; One grade of interface of provision of equipment of common Windows driver program, offer API to employ the layer interface through DLL. The interface circuit diagram of ADuC841 and CH375 is shown as in Fig. 1. Two kinds of data link connecting means that and run side by side that ADuC841 and CH375 are serial. Adopt the way of running side by side in the module in order to improve the speed, link P0 mouth of ADuC841 with parallel bus of CH375. Besides reading and writing signal connection, adopt A14 as the address bit. A14 =0,Show it is the data on the data bus; A14 =1,Order on representing the data bus. In USB transmission course, ADuC841 and CH375 touch off through external interruption, adopts INT0 external interruption pin of ADuC841 to connect with INT # pin of CH372 directly. CH375 exports as the low level in normal working hour ACT # pin, so add a luminescent diode and point out whether the USB interface chip is the normal operation between power and this pin. The luminescent diode one has killed and offered important information for debugging of the lower-position unit procedure bright.

The system software of systematic software design is by the lower-position unit procedure (firmware procedure) , USB systematic driver program and three parts of utility program form. Utilize USB agreement to transmit the machine format model and is shown as in Fig. 2. Data acquisition and data transmission subroutine that the software program of this system mainly includes language C wrote the one-chip computer, and the data real-time display which the epistasis PC written with C # gathers, handling analysis, data keeping and procedure of sealing. The firmware procedure of the program device of the lower-position unit is a core of the data collecting system, the lower-position unit procedure mainly utilizes KeilC51 to be written. In order to reduce the complexity and increase the maintainability of the procedure, the lower-position unit programming adopts and inquires about the way carried out again in order that the PC spreads over through the USB interface first. Presume the agreement in upper computer and lower-position unit communication, presume corresponding command word and check field in the agreement. The master command word has systems that finds whether it is normal and presuming sampling frequency, presuming that samples the point size, samples the enabling signal etc. or not. The intersection of lower-position unit and for scan the intersection of command word and variable constantly, see it effective main program. It is original to be monitored the command word and set invalid, after the upper computer sends out the new command word, the lower-position unit enters the interrupt subroutine to receive the command word, the command word sets effective. After the content that the lower-position unit scans the new command word, carry out corresponding operation, then will wait to monitor the command word to set invalid and continue waiting for the new command word. The function of the task of refinement of this kind of design, help to develop, debug and safeguard. The data acquisition subroutine runs after the main program receive and start the course command word of data acquisition. After the one-chip computer receives the command word that the upper computer sends through USB over, start the course of data acquisition. It utilize slices of inner timer set for, gather time interval, pay data acquisition with slices of inner ADC. In the interrupt subroutine while booking, the one-chip computer will gather the data of two passways, deposite them in the buffer in certain order, then check whether the buffer is full, if the buffer is discontented, the sub end of program of timer interrupt, otherwise send the data in the buffer to the upper computer through CH375, clear out the buffer, the sub end of program of timer interrupt. It is easy to develop a great advantage of USB driver program, this system. Nanjing oozed the permanent company to already offer the general USB driver program to user. Only need installation Off-The-Shelf USB to drive the erection procedure, it has offered a lot of interface functions for development of the utility program. Because mainly adopt and upload in batches and download the way in batches, mainly use CH375ReadData, functions such as CH375WriteData,etc.. This part does not need writer. The procedure upper computer procedure of the upper computer can adopt many kinds of software development tools, this system has written the utility program with C # language under Visual Studio2005 development environment. Mainly finish reading, revealing, keeping, opening and printing the work of data,etc.. It is the key part of the upper computer procedure that the data read the course. For in from under location machine-readable data fetch at influence by interface smoothness that be responded to, make use of multithread to realize the data to read in the programming. Data acquisition work finish in single sub thread, but main the intersection of thread and piece responsible for, finish mouse, keyboard response in user. In the sub thread of data acquisition, offer API to employ the layer interface to visit the buffer in USB driver program directly through DLL. After succeeding in turning on the apparatus, utilize CH375WriteData interface function to write the command word in the buffer, send the order to the one-chip computer; Utilize CH375ReadData interface function to read the data in the buffer, the data gathered. Under Visual Studio2005 development environment, it is relatively lower to write the difficulty of program development of the upper computer. It is ocular that the real-time display of data has increased course of data acquisition. The data gathered set up a software timer through GDI + drawing on PictureBox controlling part, paint the figure once through regular hour again while being every, because the time interval is less than 0.1s, it is a curve of continuous change visually. Machine format save and it opens functions to be to utilize StreamWriters and StreamReader completion of C in the # mainly. Print data and figure and mainly use PrintDocuments, after transferring Print method, characters and graphic output that will need printing in PrintDocument_PrintPage incident or painting again and can be printed.

The simple connection which utilizes one-chip computer and USB interface chip is the getting extendible data acquisition module of a USB interface to conclude the speech, need, expand data storage outside, meanwhile, still very abundant acquisition system this peripheral hardware and the intersection of I/O and resource carry on expansion functionally on the abundant slice with ADuC841. In XFT-1 type open Fu sets up the leaf and varies the spectrometer system, have utilized ADuC841 to pass the synchronous electric machine control Michael modest interferometer index glass seat. Through testing, the precision great of sampled data of this system, the transmission rate is very fast, the characteristic is steady, after through linking with PC, not merely make the memory capacity of the data great, and apt to carry on data processing, economy simple, set up leaf vary spectrometer characteristic steady in the system in XFT-1 open Fu.

Bibliographical reference: 1. http://www.analog.com/UploadedFiles/Data_Sheets/ 247905996157419352262670829ADuC841_2_3_0.pdf2. Universal Serial Bus Specification Reversion 1.1. www.usb.org, 19983. http://winchiphead.com/download/CH372/CH372DS1.PDF4. http://winchiphead.com/download/CH372/CH372DS2.PDFwww.usb.org, 19983. http://winchiphead.com/download/CH372/CH372DS1.PDF4. http://winchiphead.com/download/CH372/CH372DS2.PDF

The present digital machine adopts CCD (the coupling element of electric charge) Or CMOS sense optical device - optical device of these senses all turn optical signal into electric signals, but the conversion mode of the two is different.

The structure of Fig. 1 CCD is in CCD device - have several million sensitization picture element (Pixel) The constituent array is covered on the surface of the sensor. After exposing, the cumulative electric charge, through certain sequence on the whole CCD pel array, line up to read out from a port of CCD sensor, and change A/D through chip of a specialized analog to digital converter. CMOS changes A/D to the exposure of each picture element directly. However, the shortcoming of CMOS is that the photographic snesitivity is lower than CCD, the incoherent signal appears easily, this is mainly because the structure of every picture element of CMOS is more complicated than CCD, the sensitization of CMOS opens not to match an ADC amplifier as by CCD big _ and CMOS each picture element, (each amplifier has a slight difference) ,Compare with CCD of the single amplifier, noises that CMOS calculates should be many. But CMOS lies in the low cost to the advantage of CCD, there is little consumption, the circuit is relatively simple. On the basis of the above-mentioned pluses and minuses, CMOS applies to the low-end products of one yard of cameras, CCD is used in the medium and high-grade goods of the digital camera. CMOS sensor usually follows competence, vertical synchronization and a picture element clock with the parallel data like plain unit of RGB or YcbCr form output, can control the output of CMOS sensor video frame with external clock and locking signal too sometimes.

Permutation CCD sensors of Fig. 2 CCD picture element are different, output it for the analog signal, need a special purpose chip (including the analog to digital converter, sequence generator, vertical generator) ,Such as LR38667, AD9943, the analog signal of its processaable, changed its A/D and produced the required appropriate sequence of CCD array. The analog to digital converter is outputted for 10 or 12 parallel data of each picture element, follow the competence, vertical synchronization and picture element clock.

Certainly, the capture course of the picture will not be concluded in the sensor, on the contrary, this course has just begun. Let us have a look at the primitive picture Pass those links before turning into the exquisite pictures of display unit or other output units. In the digital camera, these handle links in ” image manipulation passway ” become . Provide a possible procedure in the picture. These algorithms are usually dealt with by dedicated DSP. Such as AT76C113 of ATMEL Company, this DSP includes automatically and photometric, automatic focus, automatic white balance.

It focus and it examine optical character system at you according to that camera according to when not making,last light sum automatic focus camera automatically, automatic focus, DSP controls the lens to activate, is making operation constantly according to the area preserved in advance, the ones that obtained the lens are the a bit clearerrest, thus control the lens to the clear dot location. Light of automatic _, measures the luminance of presetting the area, compensates the over-exposed or under-expose area by regulating the shutter speed or diaphragm magnitude, its main goal is to maintain the relative contrast degree between different areas in the picture, and reach the mean brightness required.

Picture broken to have a snack to stave off hunger some (image preprocessing) The sensor is the highly delicate components and parts, because of the influence in factors such as the manufacture process,etc., contain some defective picture element usually, so general picture mend, dispel by median filtering by some treatment technology. This kind of technology depends on such a fact, namely the rapid change among picture element is abnormal, because the optical course can only make the picture clear. The picture below, in order to compensate the defective picture element method.

White balance (image preprocessing) When we see a scene, no matter how light condition is, our eyes can all convert all inner things of the scene to a set of same natural color. But the color correctly of the image sensor ” The perception ” Depend on the light condition to a great extent, so it needs its acquired picture of mapping, make it look free of light to export finally. It can be through finishing manually or automatically that this kind of picture is shone upon. The primitive picture substantially as pursuing to come out for the sensor on the left, it is red through exporting the sensor, green, the blue pixel data are multiplied by different multiples and corrected, _ color and human eye which use _ feel unanimity.

The preconditioning has a lenses that is corrected (shade or distortion) ,This set of algorithms have solved and outputted the picture and seen the physical attribute problem of the scene of the deflection between real scene with users. Different lenses will produce different distortion. For example: The shade distortion of the lens has lowered the luminance of the area around the lens, it will make the picture present the edition line of color around that the colour difference is not normal, so DSP should carry on mathematic manipulation to the picture, in order to correct distortion.

Go mosaic, picture element interpolate, noise reduction and edge turn into, go mosaic may the intersection of image manipulation and most important and the intersection of calculation sum and operation of maximum under pipeline while being sharp. Usually each manufacturer has one’s own method. But generally speaking inducible for several master algorithm. Bilinear interpolation or a pair of three interpolation,etc. is not that the self-adaptive algorithm belong to the easiest method, very suitable for the smooth area of the picture. But will go wrong with the edge of algorithm processing or abundant area of lamination, those can offer better treatment lamination according to the self-adaptive algorithm that some picture characteristic adjust. Adaptation algorithmic one example to based on reconstruction that edge lead, and the the intersection of algorithm analysis and area of picture element confirm in the side to interpolate. If it finds the edge nearby around of picture element, carries on interpolation along the edge, but not cross the edge. Another self-adaptive algorithm is to suppose the whole target has an invariable missing, this can prevent the sudden change of color echelon appearing in the specific target. And the mosaic method that a lot of go, including frequency-domain analysis, the neuron,etc.. Every picture element (Pixel) A correspondent color (R or B, or G) Change into every picture element (Pixel) Correspond to 3 faces R, G, B

The color is changed at this stage, RGB picture after interpolating transforms into the goal and exports the space, in order to compress or in LCD, TV display image, usually needs to carry on RGB to Yuv (YcbCr) Matrix change,gamma correction on other include this also often so as to lasting target indication. May be to Yuv (YcbCr) according to standard 4_ 2_ 2 forms at this stage Output and sample the two-shot color density, in order to reduce the color bandwidth, thus will not influence the visual effect.

After treatment is at this stage, the picture is improved through various filtering action before sending the display unit or storage media to. For example: Edge enhancement, reduce the elimination of noise and artificial color to finish at this stage.

Reveal, compress and store once picture plan, work well on reveal the intersection of picture and pipeline can to two different branching, in the first branching, the image output that is handled well is to the target indicator, it is usually LCD or TV. Sent the compression algorithm of DSP, use industry’s canonial compression technique (such as JPEG) here first in the second branching picture Compress, then send the picture to memorizer mediums (it is usually a non- volatile flash card locally a little more, such as SD card CF card) .

Voltage and capacity of the single storage battery are limited, should make up and connect the accumulator battery in a series to use under a lot of occasions. But the battery in accumulator battery has problem of equilibrium. What life time of raising the accumulator battery, improve stability and reduction cost of the system, it is the important problem in front of us.

The life time of the storage battery is determined, among them the most important thing is the physical property of storage battery by the factors in many aspects.

In addition, the system is the important reason for loss of life of the battery that battery management charges and discharges technical and low and not reasonable. To accumulator battery, remove the above-mentioned reason, the inconsistency among the monosomatous batteries is an important factor too. Monosomatous battery not isostatic phenomenon existing to the charging/discharging process of the storage battery, I analyze that has compared several kinds of present Equalized Charging methods, according with proposes actually that can’t harm the Equalized Charging method, and verify the test.

Off-The-Shelf equilibrium charge-up method

Realize that carries on the Equalized Charging to every monosomatous battery which connects the accumulator battery in series, mainly there are the following methods at present.

1.Add an antithetical couplet equalization circuit on every monosomatous battery of the battery, in order to get the result of shunting. Under this kind of mode, when it is filled fully that a certain battery reach at first, the equalizing device can prevent it from being overcharged and transforming surplus energy into heat energy, battery charge that has not continued correctly being full of. This method is simple, but will bring the loss of energy, is not fit for the quick-charging system.

2.Monosomatous to each one before charging to discharge to the same level through the same load one by one, then carry on constant current charge, it so ases to be comparatively accurate balanced state guarantee one by one monosomatous. But to accumulator battery, because physical difference among the individual, each monosomatous to it reaches to be totally concerted ideal result while being difficult discharge deeply. Even reach the same result after discharging, will present the new unbalanced phenomenon in the course of charging.

3.Timing, sequence, gauging cell in the accumulator battery alone and charging evenly. While charging the accumulator battery, can guarantee charging or situation of the overdischarge will not have happened in every storage battery in the accumulator battery, therefore guarantee each storage battery in the accumulator battery is in normal working condition.

4.Use the timesharing principle, through control and switch of the switch assembly, make the extra electric current flow into the relatively lower battery of the voltage in order to achieve the charged purpose of the equilibrium. Efficiency of this method is higher, but control comparison is complicated.

Time shared control Equalized Charging schematic diagram of Fig. 1 

5.Regard voltage parameter of every battery as the balanced target, make the voltage recorvery of every battery unanimous. As shown in Fig. 2, at the time of equalizing charge, the electric capacity is connected with two adjacent batteries alternately through the controlled switch, accept the charging of the high-voltage battery, and then discharge to the low-voltage battery, until two batteries of voltage reaches unanimity.

Unbalanced problem of battery voltage of settlement that this kind of balanced method is better, but this method is mainly used in the occasion of the battery with less quantity.

The balanced voltage of Fig. 2 charges the synoptic diagram of the principle

6.The overall system is mechanically controlled by the one piece, monosomatous battery all have independent a suit of module. The module, according to presuming the procedure, charge and manage every monosomatous battery respectively, charge the automatic disconnection after finishing.

This method is simpler, but will make the cost increase to count greatly a long time in the monosomatous battery, also unfavorable to the decrease of the systematic volume.

Can’t harm and charge the way

This text can’t harm and charge the way while proposing one kind. After Equalized Charging module start, overcharged battery will transfer to battery that not full of the surplus electric quantity, realize the dynamic equilibrium. Its loss with high efficiency is few, the battery voltage belonged to is controlled in the whole journey by the module of Equalized Charging.

A circuit design

N festival battery connects the constituent battery in series, the main loop current is Ich. Each connect the battery in series to connect with an balanced bypass, as shown in Fig. 3. BTi is a monosomatous battery in the picture, Si is MOSFET, the inductor Li is a storing energy component. Si, Li, Di form a current divider module Mi.

Charge in one in cycle, the working phase of the circuit is divided into two stages: The voltage measures stage ’ Time is Tv) With Equalized Charging stage ’ Time is Tc) . Measure stage in the voltage, balanced bypass circuit out-of-operation, the main power source charges the battery, measure the monosomatous battery voltage in the battery at the same time, and calculate the duty ratio of MOSFET according to the control algorithm. At Equalized Charging stage, MOSFET touched off in the bypass controls the on-off state by calculating the resulting duty ratio, deal with the Equalized Charging to the corresponding battery. During this stage, the electric current which flows through every monosomatous battery is constantly changeable, it is each not identical either.

Fig. 3 charges the way

Remove M1 connected to B1 both ends, it is uniform that all bypass current divider module makes up. In the intersection of Equalized Charging and bypass, because the intersection of diode and unidirectional the intersection of feed-through and function of Di, all the intersection of current divider and module will transfer to upstream battery surplus electric quantity from the corresponding battery, but a surplus electric quantity of M1 transfers to battery in the low reaches.

Calculation of 2 gas switching tube duty ratios

Charging state SOC (state of charge) of the battery while charging Can be obtained by the following empirical formula, among them V is the terminal voltage of the battery.

SOC =-0.24V 2+ 7.218V- 53.088( 1)

SOC is battery present capacity and proportion of nominal capacity, SOC=Q/QTOTAL

Summary: This text has introduced the processor technology of polykaryon in terms of definition, textural difference, CAPI and embedded software. Keyword: Polykaryon; Symmetrical; Unsymmetry; CAPI

Is it correctly or by mistake? The present refered polykaryon processor is processor producer and IP supplier in order to sell more chips and kernels and the transitionality made is propagandized hotly. The so-called development technology of using direct multiplication of single kernel for this kind of polykaryon processor chip of desk calculating machine and server is pushing to the embedded system directly. If believe this kind of speech about the polykaryon processor on the transactions, waiting will know to at the time of the true requirement for the polykaryon processor characteristic one day in the future, will be astonished definitely. The actual polykaryon processor original document means a kind of new technology about the future microprocessor. Can really sell more chips and kernels, and can demonstrate some desired practical results in characteristic and power consumption in multinuclear deception at present. But unfortunately, used for using in desktop and server above-mentioned directly painless many nuclear technology of multiplication type use help to be limited to a embedded one for many years. In order to further investigate the structural challenge of new polykaryon, the organization of a non-profit-making polykaryon alliance has been established in some companies recently, its aim lies in assisting embedded industry to solve the generality difficult problem of playing polykaryon processor of chip type. This organization first challenge solved to set about Communication difficult problem during the multi-core shell fragment. Developing API norm for Communication among the kernels now. Because alliance this get permission, register formally yet, so member its announce while being inconvenient now. However, have filed an application and already paid for the first time already there are 15 at least in companies of the membership dues.

Multinuclear multiple meaning should be given at first the next definition of polykaryon. The polykaryon has many kinds of definitions, especially unfortunately, the polykaryon has already been abused again and again by the market, and even that is blamed is a kind of fraud. Polykaryon alliance think monolithic the intersection of polykaryon and device should have two and autonomy processing unit of the above. Autonomy or initiative is the important condition of the processing unit. According to this definition, the system with the coprocessor is repelled except polykaryon processor in the procedure of all host computers, it is many nuclear systems and it is nuclear to connect DSP which carry out one’s own instruction stream with host computer. This is a concise part in the definition. If touch upon AMP (unsymmetry is dealt with) And SMP (symmetrical treatment) ,Isomorphism and isomerism, the memorizer shares with the structural style of distributing etc., the concise definition will be broken through. SMP in polykaryon deal with to contain two and occasion of the above, each have the same chip, it is the same as a structural kernel, operate the same software. SMP can share the memory and buffers and bond the part. SMP uses the isologous kernel, though the isologous kernel needn’t be must be SMP. If inside is an isologous kernel, but what every kernel is operated is not identical operating systems, then turn into antisymmetrical multiprocessing (AMP) . AMP system can use the kernel of isomerism and share and store the interface or use and is distributed the memorizer too. Sometimes, AMP and NUMA (not a storage architecture) Can regard as the synonym. In any case, the isomorphism or isomerism kernel can form the polykaryon processor, the polykaryons processor can all press SMP ( symmetrically) Or AMP (unsymmetry) The mode runs. Later on, clarify the composition of each embedded polykaryon processor is very important, because different demands to have different compositions. Freescale and Intel choose a pair of nuclear embedded much nuclear structure of isomorphism with the purpose of employing in advanced industry and communication. Freescale, ST and TI Company regard consumption electronic product of all kinds of multimedia as the goal, uses the embedded chip of polykaryon of isomerism, Nomadik such as i.MX and ST of Freescale. Other companies, have several dozen, several hundred and even thousands of pieces of nuclear isomorphism or isomerism polykaryon processor as PicoChip Design and Connex Technology Company constructs. The intersection of difference and huge the intersection of polykaryon and processor in essence these, programming and hardware high to walk abreast degrees of the intersection of and specialization further in software.

AMP and the intersection of SMP and more difference, about AMP or dispute of pluses and minuses of SMP, from common to calculate polycomputer and multi-processor of field begin, been argueing for a long time and consultation. Though has lasted decades, has not still seen the clear winner float above the surface of water. Two upper and lower level of scheme say, clean the street clear, finally by the applied need in order to do what he thinks is right accurately. Now, the playground here is disputed and transmitted to again embeddedly. Use SMP, views from the point of employing the angle, the operating system has concealed CPU structural quality and offered some additional functions. There are a lot of to can support operating systems of SMP, including real-time operating system. Among them have both the commercial one and open source codes. Relatively AMP is easy in the programming of SMP, though the multithread programming of SMP is relatively difficult. The price of the known software occupies the equivalent number in the project is developed. In addition, SMP is more largely because of a area of silicon, consume energy and keep the complicated scheduling problem of cohesion of cache, there is name of the scheme of high price. Nuclear expenses when a factor of connecting bandwidth, moving ahead simultaneously, locking etc. is strengthened, make the scalability of SMP limited. Moreover, portable SMP system, because need to highly use the network on slice, the multinuclear frequent connection consumes more valuable electricity. The cohesion of cache, initiate SMP system and can’t produce anticipated access delay time, make some real-time application systems unable to accept. SMP system more long access time, even can adopt the multithread of the hardware to remedy, will still produce the decline of the characteristic. Elasticity of SMP system is bad, when nuclear to use the quantity to increase, there will be more kernels that make the characteristic drop because of waiting for thread resources. AMP, under the support condition with hardware, respects such as a area of power consumption, silicon,etc. are improved to some extent, the efficiency ratio is SMP high. According to the traditional statement, the programming of AMP is relatively difficult. Generally speaking, cut utility program apart into Cheng section of loose coupling, it shines upon give distributed AMP to be one light thing in hardware structure and then. Some advocates have argued, can create the stepped health ecotope of the optimizer for AMP. But want to gather a plurality of program segments into the whole with agressiveness, it is not still easy thing. On however, it is at slice polykaryon number increase to certain extent at,it is seem more feasible not to adopt by SMP and AMP schemes mixed.

Many kinds of storage architecture whether the intersection of issue and many nuclear structure can discuss according to the intersection of memorizer and structural style with mechanism that Communication adopt too. For sharing many nuclear systems of storage architecture, adopt SMP programming modes more traditionally. Each kernel can be visited to all memorizers in the global address space. The typical method to visit shared memory is to use the controlling mechanism that inquires through the bus line, it to prevent by a plurality of kernel from with when visit by memorizers same. In order to make every kernel on one can be visited to all memorizers, this is method that directness understands the most. In addition, sharing the storage organization can be used and quoted the way to transmit the data, the data needn’t move truly. At too many kernel with when deposit and withdraw when,know shared memory last bottleneck. Traditional SMP programming mode, can not adapt to many nuclear system processors very much. Because SMP traditional programming mode assumes, there are mechanisms such as homogeneous access structure and buffer memory,etc.. The power consumption of SMP is unsatisfactory, can’t reach several dozen and even several hundred desired nuclear levels of embedded many nuclear systems in the flexible respect either. It is the excessive consuming that SMP moves ahead simultaneously to most embedded many nuclear systems thick and fast. The mode is clumsy and ineffective that embedded many nuclear systems need to be suitable for Communication and programming, but SMP of flow for flowing. The distributed structure includes from global Internet, long haul network (WAN) To the LAN (LAN) ,Server, single chip device with various treatment kernels. For distributing many nuclear systems that are stored, every kernel has one’s own local memory. Though there may the overall situation that stores the address space, need various information transmission and resource synchronization mechanism and could communicate. With one’s own local memory kernel needn’t share, deposit and withdraw with other kernel efficiency and support and stretch out and draw back. Require as kernel a certain from other singly or a plurality of kernel obtain data and when the order, must move ahead simultaneously among them, and the data must move and replace and quote among the processors physically. Information transfer of supporting the portable shape that programming runs side by side. Distributed programming is usually than multithread (but it can work in SMP system it is very good) Programming is easy. However, the required code of the information transmission is greater than running side by side the transmissive share code. The transmission mode of information is a serial Communication process (CSP) at first And the one that design. Can associate it with at wording of serial communication, it will run on modern to require compact science of code employ the above, let alone use it on the embedded telescopic system. In order to support these many kinds of different storing and Communication architectures, has developed many kinds of API standards for many years. In that call it OpenMP (open multiprocessing) And MPI (information transmission interface) Two standard. MPI is distributed applied information transmission API far and wide in the computing system on a large scale. It can be used in many kinds of distributed storage organization, is suitable for the mobile system too. Each RUNNING hardware can be optimized by oneself, therefore it is high speed. Though MPI is powerful, it is complicated. If bring into play various functions, the memory on the one piece polykaryon is far insufficient, computing cost big to enable the time delay of the storage system too big at the same time.

Though Communication standard developed among more quick Communication API processor is numerous, that none is distributed for the near neighbour (tight coupling) , store compactness, characteristic, restrain the harsh embedded multinuclear system from design. In embedded world, it is symmetric to apply most to the right and wrong per se. Whether many nuclear systems can use the kernel of isomerism in the on-chip same form, or operate different operating systems and become non- symmetrical structure on the kernel of isomorphism, or make the two coexist on the same chip. In conformity with the intersection of opposite direction and many transformation of nuclear system, industry agree abstraction erupt the concept simultaneously, make it express API for use in a series of programming common, simply, effectively, ocularly. This is a aim of a polykaryon association. While writing the norms of embedded many nuclear systems, deal with resource management (kernel, stores, connects, I/O) ,Among kernel communication,and slices of expert for synchronism when state to some extent. Writing API should not be only directed against the single operating system, or simplex SMP operating system. When many nuclear systems of isomerism cross over a plurality of kernels to operate a plurality of operating systems, need to consider the resources that any operating system can’t operate. The intersection of hardware and the intersection of accelerator and the intersection of inoperative and operating system any rely on, run at that time nuclear the intersection of operation and the intersection of system pair and its cross correlation work only. Complexity of this heavier kind of system of the accelerator of the hardware. The alliance has already set about working out API of the information transmission and resource management regarding embedded to distribute basic communication. Inside calls it Communication API (namely CAPI) . The target system of CAPI includes the kernel of multidimensional isomerism, connect on slice, the memorizer, operating system, software development tool, and programming language. CAPI is about writing the norm of API, but not its realization. The members of the alliance can consult it and finish one’s own required processor structure and select to be realized by CAPI of the operating system freely. Though there is MPI and OpenMP industrial standard of programming of multi-processor, but its original goal still only concentrates on large-scale SMP distribution system and specific and particular application (such as scientific computation) . About elasticity, as as other canonial goals restriction of CAPI its. Moreover, compare with application respect, its CAPI is some of generalization even more. As shown in Fig. 1, CAPI takes shape single layer, on it can be the application layer or abstraction layer which the developer constructs. Best for characteristic, communication, move ahead simultaneously, mark with allocation of resources under kernel, by application layer and CAPI layer being directly mutual, stride the call of a series of time consuming operating system. CAPI has a long bunch of unique characteristics and functions supported.

Fig. 1 CAPI takes shape single layer, on it can be the application layer or abstraction layer which the developer constructs. Best for characteristic, communication, move ahead simultaneously, mark with allocation of resources under kernel, by application and CAPI being directly mutual, stride the call of a series of time consuming operating system. What provided is two nuclear situations in the picture.

The work among the balanced multi-processors is born transparently to write the software and think RTOS of a lot of support SMP in future, have avoided and written this part of software. The alliance hopes to lead this kind of convenience into AMP system too, though it is not relaxed to develop this part of software. Develop putting in an position and swiftness of the procedure lain in designing in main challenge of the application software. Programming personnel are devoted to optimizing more during programming, and put in an position fast, do not care about requirements for adaptability of different hardware structures, need and industrial standard of the market,etc.. The change of an ordinary hardware may lead to unite to and increase a lot of kernels, even different processors. Accordingly, will also involve the life cycle of the software. The developer needs to maintain the huge code library and how many generations ‘s products are ever extended evolved. As to the processor of the host computer, if it was quite steady and standardized operating system that used, will contribute to developing the software of reusable and repeatable mapping. But the present focus has already transferred to and occupied the application framework above the operating system. The application framework such as OpenMax of the multimedia, GStreamer and Direct Show have very great help in writing the software. However, most embedded software is operating on the dedicated processor for special function, have not usually accorded with the canonial operating system. Under such situation, shine upon and all turn into a very difficult problem fast. Today, there is inherent parallelism in most embedded application, wait for the programmer to develop. It is easier for them to shine upon SMP structure, and still the challenge so far to AMP. Communication among the process of floating above the surface of water newly (IPC) It is very helpful for the standard to solve this kind of problem, the polykaryon alliance is in course of developing too. It can write out and can give the modified software to the current structural old software in the future, and shift it to AMP. If using CAPI must revise the software, for being easy so as to move, may still need to build up the coupling of the looseness again. CAPI offer transplantation of source code and put in an position, make structural independence and flexible also. Can also even imagine, change CAPI into a framework with these characteristics, is used in the kit EEMBC of the assessment routine.

Fine middleware a society can increase applied interoperability, person who transplant and flexibility to the middleware of news soon. It can be distributed the utility program among a plurality of isomerism processor kernels. It can isolate through the other operating systems when employ the detail of each operating system to many operating systems, reduce the complexity of programming. Realize the canonical form of the message passing middleware, it is to adopt the software storehouse of the middleware. CAPI is an example of using message passing API middleware. Though the importance of CAPI is extremely crucial, it is in the bottom layer of the heap of middlewares, all middlewares on the senior level in the heap are performed based on it then come. Poly-Messenger of PolyCore software is an example of the message passing middleware. After waiting for CAPI to finish, expect to offer one set to possess mapping and put Poly-Messenger CAPI of ability as PolyCore. What it is offered by many nuclear systems is a set of unitary API. After abstracting the assembly with different hardware and with different software again, it will offer from the getting binuclear nuclear high-efficient flexible ability of several hundred. Different embedded application needs different parallel structures. Employ and SoC will be more and more complicated, the software will develop into and include the multi-type algorithmic complicated operating and their coordination between each other. The video decoding algorithm will demand to drive multinuclear ability. A large amount of application will require the multinuclear processor. Among them it is the only choice that a lot of employ and use multinuclear SoC. Already inevitably ground cover of polykaryon alliance involve in the polykaryon and debug the field. Support any embedded processor combined polykaryon and multi-processor system within developing instrument that a lot of producers declare them. Service terminal substantially as including in the extant scheme there are JTAG probes and another end, have a plurality of more development of varying with processor to debug the dedicated adapter. Although they can debug many nuclear systems reluctantly, not overall, it is binuclear and not all right that the system exceeds. Such as to using 16 debugging devices in 16 nuclear systematic imaginations of one. In the plan of the polykaryon alliance, plan to develop a canonial debugging prototype machine and corresponding API, hope the producer can consult unitary many nuclear system debugging devices. In order to meet the upcoming huge polykaryon revolution, the industry must advance the multinuclear ecotope hand in hand. Polykaryon alliance want manufacturer, the intersection of middleware and provider, the intersection of processor and manufacturer, the intersection of EDA and manufacturer of operating system, employ developer, the intersection of OEM and manufacturer and gather one while being other, encourage confidence, strengthen faith, work as one man, draft one accords with common required planning blueprint, guarantee its implementation. The births of the new things, original, the acceleration that is continued. The polykaryon alliance has a firm foundation stone established of the original one, have already set about dealing with the key challenge, with the development of undertaking, the emerging of the heir, shoulder heavy responsibilities, have a bright future! (Liang HeQing is translated from ” Microprocessor Report “)

Summary: This text has described protection feature, and overvoltage, voltage shortage of a kind of novel voltage taking a sample electrical machinery protector, interrupted (or error phase) Wait for the characteristic. Keyword: The novel voltage takes a sample; Protector of the electrical machinery; Protection feature

The foreword, in the use of the three-phase alternating current motor, it is used in the transmission Apparatus with irreversible three-phase (such as water pump, air blower, air compressor, lift electrical machinery,etc.) that increasingly many . In order to enable electrical machinery and can be protected in time under interrupting, phase sequence, overvoltage, voltage shortage situation, corresponding protector should have, protect the function while being above-mentioned, in order to guarantee electrical machinery and Apparatus normal safety work. In the voltage taking a sample protector, usually monitor the electrical machinery working voltage through the protector, judge the state of its voltage (such as overvoltage, voltage shortage, phase sequence, error phase, and the above-mentioned faulty indication appears on the protector faceplate) ,If is out of order, the protector, to control circuit Apparatus (such as the AC contactor) in the three-phase feed circuit Control, the major loop power of breaking, thus and transmit the Apparatus to carry on valid protection to the electrical machinery. Taking a sample its maximum point compared with taking a sample type of the electric current of protector of voltage is: It is with having nothing to do the power magnitude of protecting the electric equipment, and only protect according to situation of the quality of the network source, enabling and is protected electric Apparatus from power quality badly causes damage. Especially in the three-phase irreversible Apparatus or feedder line, after confirming the phase sequence, while maintaining or changing the power supply line and asserting originally the error phase of phase sequence meets, the protector can distinguish its original phase sequence, thus protect electrical machinery and corresponding apparatus.

Taking a sample protector of usually voltage of protection feature of the protector, mainly protect electrical machinery open phase and phase sequence, and in actual motion to electrical machinery, working voltage it in voltage shortage or overvoltages to be very difficult to blow get effective protection often, the real working condition of the electrical machinery to being protected, it is its protector that the operating range is wide; In this operating range (exchange three-phase 300V 460V) ,The protector realizes its voltage shortage and overvoltage protection movement characteristic (movement characteristic is shown in Fig. 1, Fig. 2) . In addition on the above-mentioned foundation of protecting the function, the protector can also follow the demand, not merely adjustable to overvoltage protection (380V 460V) And low-voltage protection (300V 380V is adjustable) The magnitude of voltage is set up, and it protects and delays time adjustable (overvoltage protection: Time delay 0.5S 5S is adjustable; Low-voltage protection: Time delay 1S 10S is adjustable) ,This protected the function and used and expanded and used the space for voltage taking a sample protector. Protector voltage shortage and movement characteristic of the overvoltage (Fig. 1) China, the intersection of characteristic and for being single-phase to pass the intersection of voltage shortage and the intersection of characteristic and line, characteristic line 2, pass, owe voltage characteristic line, characteristic line 3 to cross, owe voltage characteristic line for biphase for three phases 1 line.

The protector voltage shortage of Fig. 1 and movement characteristic of the overvoltage

Electrical machinery protector in design, consider protector should have overvoltage, voltage shortage, broken the intersection of error phase and 3 kinds of protection functions as an organic whole, adopt 3 input end negate AND gates and voltage comparators to finish this function. If the above-mentioned trouble takes place, in group IC4B (Fig. 2) Input end Determine to break error phase, overvoltage, voltage shortage trouble separately, signal input is ” 0 ” at this moment Level, and by the oppisite phase of group IC4C (use this group of output ends To drive the working condition of V1) Make V1 end, KA1 turns from attracting state into and releases the state, controls the contact to change. The contact of KA1, in order to release under the state (V1 end under the working condition) in Fig. 2 ,The intersection of protector and in the form of attracting KA1 (V1 enlarges under the working condition) when being like being in normal operation state .

The disconnected error phase of schematic diagram of picture 2 AS-11 electric motor protector protects the three-phase power to measure through A, B, C end, it put RC phase shift circuit into separately and three-phase power,such as will certainly,at n, w _ is minor in vector in nw at both ends, through voltage commutation to this, filter, make L3 (disconnected error phase) Point out, have in order to drive, then the intersection of photosensitive resister and IC2 (blow, isolate to sampling signal with working voltage) Conducting state that the place does not end. Thus make IC4A input end, end ” 0” The state, export The end is ” 1 ” ,Mainly depend on IC4B inputs at this moment Change of the end. Interrupt while being mistaken or open phase vector, nw of _, increase at the trouble, through make L3 and IC2 work to rectification, filtering of voltage this. IC4A input end is ” 1” ,Then output end It is ” 0 ” ,Thus cause V1 end, the intersection of KA1 and release, in the form of protection work protector. The work of voltage shortage protects and acts as group IC1A End (voltage shortage) Voltage with End (pass the partial pressure of R8, R9 resistance by IC4A end) ,In IC1A Terminal voltage U >U ,(conj.) The end is ” 1 ” ,Pilot lamp L1 work of voltage shortage. And compares (charges C5 through RP3, R11, sets for the guard time of voltage shortage) in IC1B ; It is ” 0 ” to carry UU When, the end is exported ” 1” ,The pilot lamp L2 work of overvoltage, in IC1D End with End (RP4, R17 charge C9, the time setting of overvoltage protection) U

The typical application circuit of the circuit AS-11 electrical machinery protector of typical application is shown in Fig. 3.

Fig. 3 employs the example picture of the circuit

Conclude the speech voltage this take a sample protector of electrical machinery in case of two kinds overvoltage, voltage shortage, because it is wide to protect the voltage range, and voltage protection parameter value and guard time can be set up, this, in order to offer maximal convenience on user’s inuse. In addition protect the most common open-phase trouble and phase sequence of electric motor, is not limited by the magnitude of horse-power of equipment of the electrical machinery, it is a taking a sample protector maximum characteristic of the voltage, have already been used extensively now.

Bibliographical reference: 1. Rise in Qian JinChuan, gold forest: The electric motor protector of electronic formula is simplied analyse, the electric Apparatus of the lathe, 2004.2 issues

Foreword ADS8361 A sampling rate is 16 analog to digital converter device of double-channel (ADC) of 500kSPS ,This converter has 4 the whole differentiating incoming channels, a pairwise pair, in order to realize the synchronous high-speed acquisition of signal. The input end to sample the hold amplifier is the whole differentiating, in addition, the input end of ADC keeps as the whole differentiating. This makes this ADC have remarkable common mode inhibitory potencies: It is 80dB in 50kHz, this is very important under the environment of high noise. MSP430 devices such as new MSP430F2013,etc. have common serial interface (USI) ,Therefore can be used in very simple and direct interface, this interface does not need to ” bond logic ” And there are few required software expenses. Some employ the requirement to realize accurate timing to the passway of synchronous data acquisition, we can obtain the required systematic result with this kind of interface at this moment. Hardware ADS8361EVMADS8361 It is the instrument of Dezhou (TI) Bunch that put out do the intersection of ADC and the intersection of electric machine control and the intersection of product series and product. EVM has offered the relevant platform, in order to demonstrate the function of ADS8361 ADC when cooperating with different TI DSP and microcontroller, and employed and offered and deposited and withdrawn all simulation and digital signal function conveniently to the made-to-order final user.

The hardware imterface structure chart eZ430-F2013 developing instrument eZ430-F2013 of Fig. 1 is the intact MSP430 developing instrument, including assessing MSP430F2013 all required software and hardware. We store excellently and offer this hardware with USB facilitated. EZ430-F2013 adopts embedded work bench IAR to integrate and develop the environment (IDE) ,In order to offer the intact simulated function, this device offers two kinds of options of independent system design and detachable goal board, in order to integrate in the existing design. More details, please visit: www.ti.com/ez430. The hardware imterface connects requiring and adopting three simple line interfaces (see Table 1) the most low of eZ430-F2013 and ADS8361EVM . Hardware connection is shown as Fig. 1. CLOCK of ADS8361, (RD + CONVST) Connect with Serial Data A pin to SCLK, MOSI and MISO pin of USI port separately. chip select (CS) The pin is earthed, because only put one ADC on the port. If connect the multiple device on the bus line, then GPIO that the chip select pin can be used on MSP430 device controls. Software interface MSP430 All software adopt IAR embedded to last platform (Kickstart edition) Write and compile. This software is a charge free edition of IDE, and here www.ti.com/ez430 The tools of websites are supported (TOOL SUPPORT) Some download. You can also ask to get the code used in examples. USI sets up USI module to offer the basic function of a synchronous serial Communication scheme of support. USI has built-in hardware functions, thus has simplified the implementation of SPI communication. In addition, USI module also has look-at-me functions, can further reduce the expenses of the software.

The intact single-channel switching cycle USI of Fig. 2 controls 0 and 1 (USICTL0 and USICTL1) depositing device Set up the elementary operation of the serial interface. Through setting up 3 in USICTL0, 5, 6 and 7, can dispose ports under SPI dominant mode. In addition, it can set up USI counter to cut off in USICTL1, thus realize SPI Communication effectively with the minimum software expenses. The polarity, signal source and speed of the serial clock can all be through setting up USI clock control depositing device (USICKCTL) Controlled. In terms of this text, clock polarity is set as zero (keep for being low) ,The clock source is SMCLK, the frequency demultiplication coefficient is one. Bit clock and shift register dispose and realize control in USI port, is counted the depositing device (USICNT) by USI location Location arrangement determine. There are 5 USICNT registers, can offer and reach cycle of 32 SCLKs more each time. If USICNT has for 0

In recent years, the multimedia technology enters people’s life gradually. MP3 player has already become popular walkie audio frequency playing device, because MP3 code algorithm is very complicated, at present, the recording functions of some MP3 players are mainly realized on the basis of ADPCM algorithm and DSP. This text has explained ADPCM pronunciation compiled code VLSI chip design method and made use of hardware of FPGA to realize.

ADPCM algorithm and coder-decoder principle

ADPCM (Adaptive Differential Pulse Code Modulation, adapter differential pulse code modulation) The differentiating characteristic from adaptive character and DPCM system of comprehensive APCM, it is a kind of waveform coding with better characteristic. Its key thought is: Utilize adaptation change, quantize magnitude of steps, go the intersection of code and little difference with small quantized steps, difference with great code of using the large quantized steps to go; Use sample value in the past estimate next predicted value to input into sample, make the difference between actual sample value and predicted value always minimum. The amplitude of not every sampling point of quantized value of ADPCM record, is the amplitude difference of and the former sampling point amplitude of this point.

ADPCM makes use of high correlation and quantized rank adaptation between sample and sample to compress one kind of machine format undulate encoding techniques. ADPCM standard is a code switching system, it uses ADPCM to change technology 64kb/s A law or u law PCM (pulse code modulation) Mutual conversion between speed and 32kb/s speed. The simplified block diagram of ADPCM is shown as in Fig. 1.

The input signal of ADPCM coder-decoder is G.711 PCM code, the sampling rate is 8kHz, each code is indicated by 8, so its data rate is 64kb/s. And the output code of ADPCM is ” The adaptation quantizer ” Output,that this output not to be until 4 persons represent for differentiating signal, last 8kHz sampling rate of it, its data rate is 32kb/s, obtained 2 in this way: Data compaction of 1.

Overall structure of the circuit

Because of ADPCM algorithm, can divide the compiled code VLSI chip of the pronunciation into several pieces of module of encoding, decoding, storing, controlling and clock. The module of code realizes the data compaction function, convert PCM signal input to ADPCM yard; The memory module, under the function of the control module, ADPCM yard which is kept the resulting code; Decode the module and realize and decompress the function, change and get PCM yard ADPCM yard; The function of the control module is to control the coordination work of other module; The module of clock mainly realizes that carries on the frequency demultiplication to the primitive clock signal of Jingzhen of outside, in order to get the actual required clock signal of circuit system. The overall structure of the circuit is shown as in Fig. 2, among them En_en, En_de are the enabling signal encoded and decoded respectively, RST is a reset signal. It is ” 1 ” to act as WE When, RAM writes effectively, and it is ” 0 ” to act as WE When, it is effective to read RAM, CS is ” 1 ” When, RAM can be written or read.

(a) ADPCM Coder

(b)ADPCM demoder

Fig. 1 ADPCM simplified block diagram

Design process of the circuit

This literary grace carries on circuit design by Top-down method. Mainly design the procedure as follows: The RTL grade based on that Verilog HDL uses Active-HDL to carry on the circuit is described at first and function emulation; Will synthesize and adapt in Quartus II development system China the artificial accurate procedure of the function; And then the network list file ’ . vo) Have the intersection of time delay and information mark file instead ’ . sdo) Call in ModelSim SE, and join and select to carry on sequence emulation in the corresponding device storehouse of the device; Sequence emulation is through being back, ” * getting Quartus II. sof” File download in FPGA going on, can’t shed electric actual test through the intersection of JTAG and Configuration Mode, can also ” *. pof” File download in FPGA going on, can shed electric actual test through the intersection of AS and Configuration Mode. The procedure of top level of the circuit system is as follows.

Whole structure chart of the circuit of Fig. 2 

module ADPCM_TOP ( PCM_OUT,PCM_IN ,RECORD,PLAY,CLK, CLK8K) ; parameter ADDR_WIDTH =14; parameter PCM_WIDTH =8; input [PCM_WIDTH-1:0] PCM_IN ; wire [PCM_WIDTH-1:0] PCM_IN ; output [PCM_WIDTH-1:0] PCM_OUT ; wire [PCM_WIDTH-1:0] PCM_OUT ; input CLK, RECORD,PLAY; output CLK8K; wire [3:0] code_in,code_out; wire en_encoder,en_decoder,re_rst,pl_rst,WE,CS,CLK_8K; wire [ADDR_WIDTH-1:0] ADDRESS; assign CLK8K =CLK_8K; CLOCK_GE U0 (CLK,RECORD, CLK_8K) ; encoder_new U1 ( PCM_IN,re_rst ,en_encoder, CLK_8K ,code_in ) ; RAM U2 (ADDRESS,WE,CS,CLK_8K,code_in,code_out) ; decoder_new U3 (pl_rst, CLK_8K ,code_out ,en_decoder,PCM_OUT) ; controllogic U4 (CS,re_rst,pl_rst,en_encoder,en_decoder,WE,ADDRESS,RECORD,PLAY,CLK_8K) ; endmodule

Circuit design of the Sub-Module and emulation

The whole pronunciation compiled code VLSI chip includes code circuit, decoding circuit, storage circuit, controlling circuit and several parts of clock circuit. Describe the design of the key circuit specifically separately as follows. A code circuit code circuit implementation data compaction function, convert PCM signal input to homogeneous PCM yard, then with predicting the signal carries on the differentiating, the differentiating signal got passes ” adaptation quantizer ” Get ADPCM yard compressed encoding, ADPCM yard returned and ” gone against the adaptation quantizer ” And ” adaptive predictor ” Used for constructing the next prediction signal. The circuit simulation waveform of the code is shown as in Fig. 3, among them PCM_IN is the input signal of the Coder (PCM yard) ,For outcoming signal that receive under code CODE .

Code circuit simulation waveform of Fig. 3 

2 decoding circuits

Decode circuit implementation, decompress function, ” go against the intersection of adaptation and quantizer ” the intersection of ADPCM and yard Get the quantized differentiating signal, quantized differentiating signal and predicted value add and get and reconstruct signals, then convert to PCM yard. Decode the circuit simulation waveform and is shown as in Fig. 4, among them CODE is the input signal of the demoder (ADPCM yard) ,Outcoming signal (PCM yard) got after PCM_OUT is in order to decode . In contrast to PCM_IN before the compiled code in Fig. 3, can find out and it is very little to decode the error.

3 other module

The controlling circuit controls the coordination work of other circuit module, can enable the memorizer write signal while encoding, can enable the intersection of code circuit and output data the intersection of write and memorizer in time; Can enable the readout signal of the memorizer while decoding, the code and decodes and can’t go on at the same time ing. The clock circuit mainly realizes that carries on the frequency demultiplication to the primitive clock signal of Jingzhen of outside, in order to get the actual required clock signal of circuit system. The outside Jingzhen free-running frequency that this system adopts is 14.318MHz, can get 8kHz clock after passing the frequency demultiplication. The storage circuit, under the function of the controlling circuit, ADPCM yard (32kb/s) which is kept the resulting code ,Because only need the function of the proof circuit, has only presumed the recording storage space of 2s, namely 64kb memory capacity.

Whole circuit simulation

After Sub-Module circuit simulation is correct, carry on emulation to the system wholly, can get the waveform illustrated in Fig. 5. This artificial input signal PCM_IN encourages adopting Testbench to produce. In the enabling signal RECORD of the code is ” 0” When, begin codes, RECORD jump transfer reaches ” 1 ” When, the code is shielded; PLAY is to decode the enabling signal at this moment” 0” ,Begin to decode, PLAY jump transfer reaches ” 1 ” When, decoding is shielded. Can find out the response of output PCM_OUT after encouragement and decoding of input signal PCM_IN before encoding basically accords with from the picture. Because ADPCM algorithm diminishes and compresses, can confirm the design of a circuit system is correct and reliable.

FPGA verifies and the conclusion

This text verifies the circuit designed on the basis of FPGA. Choose EP1C6Q240C8 device of Altera Company series Cyclone here, there is the memory capacity of 90kb, a logical unit 6k in its inside, 2 PLLs. Because the circuit adopts 8kHz sampling frequency, ADPCM yard after the code is 4, it is 2s to set for the time of recording, so need 64kb memory capacity; Meanwhile, it needs the logical unit of about 400 left and right sides to design. So choose this low-cost FPGA namely satisfiable designing requirement, and basically fully utilized internal resource. There are 240 pins of this chip, can satisfy the pin joint outside, and the price is easy to accept.

FPGA proves that shows: The clock of maximum of the circuit is delayed as 26.903ns, maximum operating frequency reachable 37.17MHz, can well reproduce the pronunciation input, have higher fidelity and very good real-time nature. Report in the electronic map, vehicle carried intelligence terminal pronunciation, public security alarm system, especially respects such as the walkie pronunciation recording device,etc. have higher using value. Meanwhile, pointed out the direction of the high-efficient design method of compressing of digital speech too.

Code circuit simulation waveform of Fig. 4 

System simulation waveform of Fig. 5